Using machine learning to narrow the possibilities for a better quantum tunneling interface

A few researchers at Fudan University in China have used machine learning to narrow the list of possible improved tunneling interface configurations for use in transistors. They published their results in Physical assessment letters.

Over the decades, engineers have worked to enforce Moore’s Law, faithfully doubling the number transistors which could be placed on an integrated circuit approximately every two years. But such efforts are jeopardized because of the laws of physics — especially those related to quantum tunneling that degrade performance. More specifically, the material used to separate ports on chips (interfaces) from channels has become so thin that load carriers can work their way through quantum tunneling. In this new effort, the researchers sought stable configurations that would minimize such tunneling, allowing Moore’s law to persist, at least for a while.

The work involved studying how tunneling is affected by the structure of a particular interface. The researchers found that the configuration of the material that made up the interface played a large role in the extent of quantum tunneling. They then used a machine learning application to study about 2,500 structures as possible replacements for the interface configuration. They found 40 configurations that seemed likely to offer a better option than the configurations currently in use. Of these, they found that only 10 were energetically stable. Testing of the 10 candidates showed that only two were able to suppress tunnel† They suggest that the two configurations could be used in integrated circuit design and manufacturing to allow for more transistors on a chip, which in practice allows for the creation of smaller devices.

The researchers then plan to refocus their efforts to see if other transistor materials are more suitable for use in next-generation integrated circuits.

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